Verification Project Manager in Chengdu for Fortune 500 Semiconductor Company
About the Company:
Fortune 500 company with experience of over 20 years in delivering semiconductor services and solutions. The company is the largest third-party design services provider in the world; its development expertise covers multiple domains and provides innovative, reliable and scalable design solutions.
Job Title: Verification Project Manager
Location: Chengdu, Sichuan Province, China
Responsibilities:
- Responsible for Testbench development for unit level and chip level verification
- Test component such as drivers, checkers, monitors development
- Integration of 3rd Party Verification IPs into the testbench
- Test plan development, scenario identification and testcase development
- Testcase execution, simulation and debugging
- Performing coverage analysis and regressions
Job Requirement:
- Minimum 10 years experience
- Hands on experience with the following skills + System Verilog or Specman background
- Hands-on project experience in using System Verilog for verification or specman
- Project Experience in designing and creating verification environment in OVM methodology
- Experienced in Verilog coding
- Experience in Unix environment for verification
- Knowledge of Functional coverage
- Scripting languages like Perl/Shell scripting
- Experience in SoC Verification for functional and self-test structures
- Tools: Modelsim/ VCS/ NC-Sim simulation environment or Specman
- Spyglass - Experience will ve value add
Mandatory skills required:
- Experience on Verilog based Verification with C/C++
- Done SoC level Verification
- Project Experience in designing and creating verification environment
- Scripting language
Contact: Vivian@KeystoChinaJobs.com
